ASIC DESIGN ENGINEER RESUME EXAMPLE

Job Summary:

• Develop module, hard-macro, and floor planning specifications for digital compute processing cores, bus interfaces, and other system-on-a-chip functions
• Investigate, analyze, and present performance, area, power, and system cost tradeoffs for hard macros using constraint, timing, and floor plan-driven optimizations
• Contribute to and drive design, floor planning specifications, and implementation meetings within a multi-disciplinary team
• Implement and debug timing constraints, RTL, Design for Test (DFT), and clock functions
• Perform netlist synthesis, Formal Verification, and Static Timing Analysis of hard macros
• Implement ECOs using automated design flows
• Complete design checks and analyses such as lint, CDC, power intent, and static timing reports
• Develop methodology and automation for design/synthesis using tcl/make/python scripts
• Experience some phases of digital IP design projects from specification, design, and verification, to documentation
• Become familiar with the ARM AXI interface/protocol which is very important almost in all ARM-based SOC design
• Become familiar with DDR SDRAM memory operations which is very important almost in all hardware systems
• Develop basic engineering skills such as documenting, communicating, and presenting ideas and designs, following engineering disciplines and delivering quality designs, … etc 

Skills on Resume: 

• Digital Design and Architecture (Hard Skills)
• Performance Analysis and Optimization (Hard Skills)
• Team Collaboration (Soft Skills)
• RTL Design and Verification (Hard Skills)
• Synthesis and Analysis Tools (Hard Skills)
• Design Automation (Hard Skills)
• Project Management and Documentation (Soft Skills)
• Familiarity with ARM Architecture and DDR SDRAM (Hard Skills)

Job Summary:

• RTL Coding including block design, top-level design and lower-power design
• Verify design and debug in RTL-level and gate-level
• Simulation, design constraints, coding style checking, cross-clock domain checking, synthesis and timing closure
• Bug analysis and fix, formal check
• Deliver design/ verification/ application documents/ SPEC
• Work closely with architecture to develop/debug new IP/ product
• Work closely with verification/ system/ Firmware engineer to verify/ validate new IP/ product
• Define architecture and micro-architecture specifications
• Take ownership of one or more modules and implement RTL
• Converge functionality and PPA of the design
• Work closely with software teams to ensure end-to-end solutions
• Contribute to design methodology, libraries, and code review
• Define chip-level features and solutions and drive implementation

Skills on Resume: 

• RTL Coding Expertise (Hard Skills)
• Verification and Debugging (Hard Skills)
• Simulation and Synthesis (Hard Skills)
• Documentation and Communication (Soft Skills)
• Collaborative Development (Soft Skills)
• Architecture and Micro-architecture Development (Hard Skills)
• Cross-functional Teamwork (Soft Skills)
• Leadership and Innovation (Soft Skills)

Job Summary:

• Participate in cutting edge Processor design in deep submicron technologies
• Work as part of a Clocks team to design various innovative solutions to support high-frequency Clocks for various platforms
• Perform RTL design, synthesis, logic, and timing verification of the Clock unit
• Handle the design discussions with the rest of the team about the architecture, intent, and implementation
• Work closely with the DFT and Physical Design teams to ensure that the Test and physical constraints are met to ensure Clock quality
• Validation and debugging of digital designs on custom ASICs and FPGA platforms using a logic analyzer and oscilloscope
• Support all stages of development from design through prototype, beta, production, and support
• Write integration plans, integration reports, and test procedures
• Coordinate with Analog IC and System Design teams during product development
• Report bugs found and work with design engineers for resolution
• Develop improvements/enhancements to existing products 
• Critically analyze and verify system performance through simulation, test, and measurements
• Provide technical expertise and guidance to engineering staff and other departments

Skills on Resume: 

• Processor Design (Hard Skills)
• Clock Design (Hard Skills)
• RTL Design and Verification (Hard Skills)
• Architectural Discussions (Soft Skills)
• Cross-Team Collaboration (Soft Skills)
• Validation and Debugging (Hard Skills)
• Product Development Support (Soft Skills)
• Technical Documentation and Reporting (Soft Skills)

Job Summary:

• Proposal and documentation on microarchitecture
• Build block-level verification environment with the test vector and golden from the algorithm team
• Perform integration into SOC and RTL coding and implementation
• Design image processing kernel code
• Analyze system verification and power/ performance
• Develop test environments for coverage.
• Assist with SOC verification, chip bring up, and perform silicon functional/ performance validation
• Assist with the back-end team in performing place-and-route and timing analysis of modules
• Image processing algorithm study, understanding the interface and design requirement 
• Actively participate in the chip bring-up, evaluation, and characterization
• Collaborate closely with MEMS, Characterization and Test Engineers in the development and characterization of the MEMS-based oscillator
• Document assigned blocks, and hold preliminary and final design review meetings
• Provide technical guidance, coaching, and mentoring of the engineering team while nurturing skill sets and capabilities
• Support other projects by management or as business needs change

Skills on Resume: 

• Microarchitecture Proposal and Documentation (Hard Skills)
• Block-Level Verification Environment Development (Hard Skills)
• Integration into SOC and RTL Coding (Hard Skills)
• Image Processing Kernel Code Design (Hard Skills)
• System Verification and Power/Performance Analysis (Hard Skills)
• Test Environment Development for Coverage (Hard Skills)
• Assistance with SOC Verification and Silicon Validation (Hard Skills)
• Back-End Support and Timing Analysis (Hard Skills)
• Communication (Soft Skills)
• Mentoring (Soft Skills)

Job Summary:

• Take full responsibility for designing IPs, being block or sub-system
• Break down Requirements into functionalities and create the appropriate description
• Develop IPs and run the appropriate quality checks
• Support IP integration and verification and ensure design quality
• Continuously improve and optimize ways of working
• Develop competence in the technical domain
• Design of ARM-based SOC subsystem along with security features
• Identify, evaluate, and integrate various ARM IPs like AMBA(AHB/AXI) bus matrix, Crypto cell, ETM, interrupt controller, peripherals, etc.
• Create logic solutions that meet challenging power, frequency, and area goals
• Code RTL representations of  hardware design, collaboratively defining verification strategies
• Perform sanity check on ARM SOC subsystem
• Create a verification plan from specification and in coordination with architects and designers
• Work with local and overseas teams with good communication skills

Skills on Resume: 

• IP Design and Architecture (Hard Skills)
• Requirements Analysis (Hard Skills)
• Quality Assurance (Hard Skills)
• Integration and Verification Support (Hard Skills)
• Process Improvement (Hard Skills)
• Technical Competence (Hard Skills)
• ARM IP Integration (Hard Skills)
• RTL Design and Verification (Hard Skills)
• Effective Communication (Soft Skills)

Job Summary:

• Work independently with little supervision
• Develop module specifications and follow through with design and programming specifications
• Model and analyze performance, area, power, and system cost tradeoffs for different micro-architectures
• Implement modules and sub-systems in Verilog RTL
• Develop and update technical documentation on an ongoing basis
• Work closely with the design verification team to define verification methodology, review test plans and develop reference and bus-functional models
• Implement and debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre- and post-silicon)
• Develop and debug synthesis and timing constraints, review clocks, and layout to achieve netlist synthesis and static timing closure
• Define the architecture, design, and roadmap of the ASIC system
• Design analog and mixed-signal circuits meeting architectural requirements and technical specifications
• Led ASIC team in design and verification simulations to ensure building blocks meet specifications at the schematic level and at the post-layout extraction stage, while fully provisioning for DFT and DFM
• Collaborate with the Layout Engineer to validate the proper layout
• Make significant contributions to silicon debugging and analysis

Skills on Resume: 

• Independent Work (Soft Skills)
• Module Specification and Design (Hard Skills)
• Tradeoff Analysis (Hard Skills)
• Verilog RTL Implementation (Hard Skills)
• Technical Documentation (Hard Skills)
• Verification Methodology (Hard Skills)
• Synthesis and Timing Constraints (Hard Skills)
• ASIC System Architecture (Hard Skills)

Job Summary:

• Own the top-level integration of a complex mixed-signal SoC
• Contribute to microarchitecture, RTL design, synthesis, and timing closure
• Manage inclusion of internal and external IPs
• Coordinate with the verification team on both block- and top-level simulation and modeling
• Work closely with the physical design team
• Participate in the bring-up and test of initial silicon
• Define architecture and micro-architecture specifications. Take ownership of one or more modules and implement RTL.
• Converge functionality and PPA of the design.
• Work closely with software teams to ensure end-to-end solutions.
• Contribute to design methodology, libraries, and code review.
• Define chip-level features and solutions and drive implementation.

Skills on Resume: 

• Mixed-Signal SoC Integration (Hard Skills)
• Microarchitecture and RTL Design (Hard Skills)
• Synthesis and Timing Closure (Hard Skills)
• IP Management (Hard Skills)
• Verification Coordination (Hard Skills)
• Collaboration with Physical Design Team (Soft Skills)
• Chip Bring-up and Test (Hard Skills)
• Architecture and Microarchitecture Specification (Hard Skills)