ANALOG DESIGN ENGINEER JOB DESCRIPTION

Analog design is the discipline of shaping electrical signals at the transistor level. Few engineers own what the Analog Design Engineer owns: the gap between a specification on paper and silicon that performs to it, across process corners, mismatches, and parasitics that no simulation fully anticipates. In the semiconductor industry, where a single tapeout in a FinFET or sub-micron CMOS node can represent months of convergent effort, that ownership carries real weight. This role sits within an IC design team and answers to chip architects, product engineers, and customers whose system requirements drive every design decision.

You will own transistor-level design of analog and mixed-signal IP blocks from architecture definition through verified silicon, serving as the Analog Design Engineer who translates system-level specifications into production-ready integrated circuits. The role operates within a cross-functional IC development team that includes digital designers, layout engineers, verification specialists, and application engineers, with scope spanning block-level design through full-chip integration reviews.

Career Impact: Engineers who carry a tapeout record in advanced CMOS or FinFET nodes - with verified silicon across PVT corners and ESD compliance - become a scarce and specifically valued category of technical talent in the semiconductor labor market.

Business Impact: When mixed-signal IP blocks fail to meet noise, linearity, or timing specifications after tapeout, the cost to a semiconductor product company is measured in respins and delayed product launches, making the Analog Design Engineer's pre-silicon verification work a direct determinant of schedule and margin.

Growth Opportunity: Repeated ownership of analog IP across process generations, from 28nm to sub-7nm nodes, builds the architectural fluency and fabrication intuition that are prerequisites for Principal Engineer and Chip Architect roles.

• Design transistor-level analog and mixed-signal circuit blocks including amplifiers, bandgap references, PLLs, ADCs, and DACs to meet block-level specifications.
• Architect analog IP solutions from system-level requirements down to sub-block specifications in collaboration with chip architects and product engineers.
• Verify block-level and top-level circuit performance across process, voltage, and temperature corners using rigorous simulation methodologies.
• Oversee physical layout implementation to minimize parasitic effects, device stress, mismatch, and reliability risks within target process nodes.
• Define and execute test plans for characterization, silicon validation, and ATE-based volume production covering functional and performance targets.
• Collaborate with digital design, verification, and application engineering teams to resolve cross-functional dependencies at the chip integration level.
• Investigate post-silicon results and customer data to identify root causes and propose design enhancements for future tape-out revisions.
• Mentor junior analog designers and contribute to team-wide improvements in design methodology and verification coverage.

• Bachelor's degree in Electrical Engineering, Electronics Engineering, or equivalent work experience.
• 5 or more years of analog and mixed-signal IC design experience, with demonstrated ownership of at least one full tapeout cycle in a commercial CMOS process.
• Solid understanding of semiconductor device physics including MOS transistor behavior, process variation, mismatch mechanisms, and reliability effects such as EM and aging.
• Proficiency in transistor-level circuit design for core analog building blocks including operational amplifiers, voltage references, PLLs, charge pumps, and data converters.
• Working knowledge of analog layout principles including floor planning, device matching, shielding, and parasitic extraction and optimization.
• Ability to interpret and act on mixed-signal simulation results including noise analysis, stability analysis, and statistical mismatch across process corners.
• Experience with behavioral modeling using a hardware description language to support top-level verification and system-level analysis.
• Strong written and verbal communication skills, with the ability to present circuit design decisions and simulation data to internal teams and external customers.

• Advanced degree (MSc or PhD) in Electrical Engineering, Microelectronics, or a closely related field, with coursework or research focused on analog circuit design.
• Hands-on design experience in advanced process nodes at 16nm or below, including FinFET-specific layout and device considerations.
• Familiarity with SerDes sub-block design, including VCOs, phase-locked loops, clock distribution, and high-speed equalizers for wireline applications.
• Prior exposure to automotive-grade IC design standards or AEC-Q100 qualification requirements, with experience supporting characterization under extended temperature and reliability conditions.

• Tapeout milestone adherence rate, measuring how consistently block-level designs are delivered to integration on schedule.
• Number of post-silicon functional deviations per block, reflecting the coverage and rigor of pre-silicon simulation methodology.
• PVT corner yield across required operating conditions, indicating robustness of design margin choices.
• Simulation-to-silicon correlation delta on key specifications such as phase noise, offset voltage, or converter linearity, measuring model and methodology accuracy.
• Design review pass rate on first submission, reflecting documentation quality and internal readiness before cross-functional handoff.
• Typical tools: schematic and simulation environment (commonly Cadence Virtuoso and Spectre), layout and physical verification (commonly Cadence Calibre)

• Base Salary Range: $130,000 to $185,000 per year, depending on seniority and location
• Bonus: Annual performance bonus typically 8 to 15 percent of base salary
• Equity: RSU grants are common at established semiconductor companies, options are more typical at early-stage IP firms
• Health Benefits: Medical, dental, and vision coverage for employees and dependents
• PTO: 15 to 20 days per year plus standard US public holidays
• Common Perks: Continuing education reimbursement, conference attendance support, and EDA tool access for professional development

Figures are estimates based on general US market benchmarks and may be outdated. Adjust based on location, company size, and seniority level.

Background check completion is a condition of employment for this role, and offers are contingent on satisfactory results. All qualified applicants will receive equal consideration for employment without regard to race, color, religion, sex, national origin, age, disability, veteran status, sexual orientation, gender identity, or any other characteristic protected under applicable federal, state, or local law. Reasonable accommodations will be provided to individuals with disabilities throughout the application and employment process upon request. Candidates must be authorized to work in the United States.

The Analog Design Engineer owns the full lifecycle of analog IP, from defining innovative architectures that meet customer performance requirements to managing risk and ensuring all project milestones are respected. Working in close collaboration with clients, stakeholders, and a production support team, this role directly enables on-time delivery of verified analog solutions in a semiconductor environment.

Key Responsibilities

• Define innovative architecture meeting the performance required by our customers.
• Design and verify analog IP blocks to specification.
• Ensure all milestones defined with management are respected.
• Follow up on layout IP development and implementation.
• Document all activities completed throughout the project.
• Report and escalate issues to management as needed.
• Manage relationships with clients and all stakeholders.
• Perform risk management to minimize project risks.

Required Qualifications

• MSc or BSc degree in Electronics or Microelectronics.
• 5-10 years of working experience in a semiconductor environment.
• Previous automotive experience is a plus.
• Strong analytical, creative, and goal-oriented mindset with attention to detail.
• Solid organizational and multitasking skills paired with accountability.
• Good written and verbal communication skills.
• Team player who is flexible, hard-working, and comfortable in multicultural environments.
• Fluency in English is required, French is a great advantage, and any other language is welcome.

Embedded within the chip and photonic design groups, the Analog Design Engineer designs medium-precision converters, operational amplifiers, variable gain amplifiers, calibration circuits, and band gap references to meet power and performance specifications. Working closely with cross-functional engineering teams, this role enables successful analog IP integration and verified silicon delivery across tapeout milestones.

Core Functions

• Design medium-precision digital-to-analog and analog-to-digital converters, operational amplifiers, variable gain amplifiers, calibration circuits, and band gap references.
• Integrate analog IP at the chip level in collaboration with the chip design group.
• Work with the photonic design team to meet power and performance specifications.
• Define and run top-level verification and modeling of analog systems.
• Define test plans for validation, characterization, and debugging.

Qualifications and Experience

• BSEE minimum, PhD preferred, in Electrical Engineering or related field.
• 5+ years of analog and mixed signal design experience, including DACs and ADCs.
• Multiple successful tapeouts with demonstrated ownership of integrated analog components, including successfully validated silicon.
• Good understanding of noise, linearity, layout parasitics, mismatch, and converter topologies and design trade-offs.
• Experience with debugging analog blocks in complex mixed-signal environments.
• Fluency in English, both written and verbal.

Reporting to the engineering lead, the Analog Design Engineer designs, simulates, and evaluates high-performance analog and mixed signal blocks and full chips while architecting chip-level solutions directly in response to customer needs. Partnering with internal designers and product teams, this role delivers end-to-end development oversight that translates customer requirements into verified, production-ready IC designs.

Primary Duties

• Design, simulate, and evaluate high-performance analog and mixed-signal blocks and full chips.
• Design and oversee all aspects of the development process.
• Connect directly with customers to understand their needs.
• Architect full chip-level solutions for customer problems.
• Schedule design effort for the project and execute accordingly.
• Coordinate activities with internal designers.

Skills and Qualifications

• Understanding of basic design components, including NPN, PNP, NMOS, PMOS, resistor, capacitor, and inductor.
• Understanding of basic network design topology.
• Understanding of IC design best practices and trade-offs.
• Basic understanding of IC processing.
• Understanding of IC layouts.

Sitting at the intersection of SerDes standards and FinFET circuit implementation, the Analog Design Engineer reviews transceiver architectures, oversees physical layout, and consults on electrical characterization of SerDes IP to drive revolutionary improvements in power, area, and performance. Operating across a cross-functional analog and digital R&D team, this role shapes the reliability and commercial readiness of Multi-Gbps PAM4 SERDES IP in industry-leading process nodes.

Engineering Responsibilities

• Review SerDes standards to develop novel transceiver architectures and sub-block specifications.
• Investigate and develop circuit architectures that address architectural bottlenecks and drive improvements in power, area, and performance targets.
• Work across project and department teams to streamline design and verification strategies.
• Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
• Present and review simulation data from internal project teams and externally at industry panels or customer reviews.
• Document design features and test plans.
• Consult on the overall electrical characterization of the SerDes IP product and investigate customer silicon data for design enhancements.

Technical Qualifications

• PhD with 8+ years or MSc with 10+ years of practical analog IC design experience in Electrical Engineering or Computer Engineering.
• In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals.
• Extensive design experience with SerDes sub-circuits, including receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, VCO, phase mixer, DLL, PLL, bandgap reference, ADC, and DAC.
• Knowledge of SerDes circuits and fabrication issues that directly impact customer use-cases, including analog/digital interactions for calibration, adaptation, and timing-handoff.
• Awareness of ESD issues, including circuit techniques and layout, and understanding of design for reliability, including EM, IR, aging, and layout effects.
• Proficiency in Verilog-A for analog behavioral modeling.
• Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired.
• Excellent communication, presentation, and documentation skills.

Come and join our team within the central IP team at Intel as an Analog/Mixed-signal Design Engineer and work on some of the most advanced High Speed IO IPs in the world, with some of the most advanced Intel processes.

Duties

• Involved in circuits for high-speed I/O design.
• Take full responsibility of a design from bottom to top.
• Work closely with mask design engineers to optimize design performance at the circuit and full-chip level.
• Propose and implement creative design approaches.
• Document and review the achieved results.
• Work closely and collaborate within a team with expert analog designers and experienced layout designers.
• Pursue continuous skill development in high-speed, analog, and mixed signal design.
• Mentor other designers as a team player within the group.

Experience and Qualifications

• Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related field with 4+ years of experience, or Master's degree with 3+ years, or PhD with 1+ years.
• Experience designing, testing, and validating analog and/or mixed signal circuits with sub-micron CMOS technology.
• High-speed analog IO designs, PHY architectures, and trade-offs knowledge.
• Deep sub-micron device physics, process technology, and manufacturing knowledge.
• Proficiency in VLSI and industry standard CAD tools including Cadence Spectre, Maestro, Finesim, AMS Designer, and Virtuoso.
• Analog layout techniques including floor-planning, matching, shielding, and parasitic optimization.
• Motivation for continuous skill development and desire to mentor other designers.

The Analog Design Engineer delivers full-cycle PLL design from architecture investigation through transistor-level schematic implementation, ATE test planning, and volume production characterization, ensuring system specifications for phase noise, jitter, and lock range are met. Based within a cross-functional semiconductor team, this role strengthens product quality by supervising physical layout and resolving dependencies across engineering groups.

Functions

• Investigate and design PLL architectures to meet system specifications including phase noise, jitter, lock range and time, reference spur, area, and power.
• Generate and validate PLL sub-block specifications that meet architectural requirements.
• Verify top-level PLL and sub-block circuit performance.
• Supervise physical design team to ensure high-quality, high-performance PLL layout.
• Develop lab and ATE test plans and measurements for characterization and volume production.
• Design and implement transistor schematics of PLLs and all component sub-blocks.
• Interface with other teams to resolve cross-functional dependencies.

Background and Experience

• Master's or PhD degree in Electronics or relevant field.
• Minimum 5 years of experience in semiconductor process technologies such as 28nm, 14/16nm, or 7nm nodes.
• Thorough understanding of advanced PLL architectures including LC PLLs, hybrid PLLs, and All-Digital PLLs.
• Skilled in transistor-level design and layouts of key PLL building blocks such as VCO, charge-pump, phase and/or frequency detector, TDC, and high-speed frequency divider.
• Skilled in the design of on-chip inductive components using tools such as EMX, HFSS, or similar.
• Proficiency with Cadence design and verification tools including Virtuoso, Maestro, and Spectre, as well as layout design tools for high-speed circuits.
• Familiarity with PLL modeling in MATLAB, Python, C++, or similar languages.
• Design of PLLs for SerDes clocking applications and familiarity with SerDes principles and topologies is desirable.

Analog Design Engineer is seeking for an enthusiastic, innovated, and self-motivated Analog Design engineer to design the next generation FTS while provide technical expertise and project planning support for new product development and existing product lines. This position requires experience interacting with customers and working in a team environment.

Accountabilities

• Provide leadership in activities associated with design, documentation, manufacturing, and test support including product design engineering analysis, drawing preparation, cost estimation, and product planning.
• Support business development and marketing activities as part of design leadership responsibilities.
• Lead support of existing product manufacturing efforts pertaining to design, documentation, inspection processes, manufacturing processes, test processes, and cost reduction activities.
• Lead failure investigation activities through application of rigorous root cause analysis.
• Assist in design and development of automated test equipment.
• Provide support and expertise in development of manufacturing, inspection, and test related process procedures.
• Prepare reports and presentations related to design and development activities including technical proposal submittals.

Position Requirements

• 5+ years of experience in the industry with strong knowledge of analog circuits.
• Military design requirements experience is a plus.
• Strong knowledge of analog circuits and ability to perform electrical stress analysis on EEE components.
• Proficiency in Cadence design suites including OrCAD Schematic Capture, PCB Editor, and PSpice, or equivalent tools.
• Proficiency in Microsoft Office including Excel and PowerPoint.
• Highly organized with proven ability to prioritize workload, meet deadlines, and manage several complex projects simultaneously.
• Good communication skills and ability to present technical data to various levels of management and customers.

Principal Analog Design Engineer will allow you to address several markets with their distinct constraints and challenges. This is a great opportunity for self-motivated team player willing to grow and impact business by contributing to solutions to tomorrow's challenges.

Leadership Responsibilities

• Lead full chip design and layout supervision of complex power management ICs for automotive, consumer, and industrial markets.
• Innovate new power management circuits and topologies for various consumer and industrial applications.
• Work closely with application engineers to develop IC specifications.
• Debug and guide failure analysis engineers to find causes of chip malfunction.
• Oversee development of IC from initial stages until production release.
• Perform analog design and verification across multiple process technologies.
• Lead design team in planning and executing development projects.
• Contribute to new product definition and guide physical layout in support of design goals.
• Produce clear and detailed technical documentation and provide mentoring to junior designers.

Minimum Qualifications

• 8.5+ years minimum IC design experience.
• High voltage design experience in DC/DC and AC/DC converters including Buck, Boost, Buck-Boost, Tapped Buck/Boost, Forward, Flyback, and SEPIC topologies.
• Strong experience in additional areas such as ADCs, DACs, drivers, clock generation, and LDOs is a plus.
• Bi-CMOS design experience and layout experience, with bipolar experience as a plus.
• Extensive experience with design tools, spice simulators, mixed-signal simulators, layout tools, parasitic extraction tools, and logic simulators.
• Working knowledge of high-efficiency magnetics, filters, and passive components including transformers and inductors.
• Experience with Verilog and/or VHDL is an advantage.
• Good communication skills with ability to work closely with applications and test engineers in ATE test systems and IC performance verification.

The Principal Analog Design Engineer owns the delivery of high performance, high speed IC product designs from feasibility assessment through volume production, working across marketing, applications, and product engineering teams in optical and wireline domains. Serving as the technical leader for a cross-functional design group, this role produces verified SiGe BiCMOS and CMOS solutions including CDR, equalizers, and laser drivers that achieve successful commercial outcomes.

Strategic Responsibilities=

• Design high speed IC products and perform system modeling.
• Lead engineering responsibility for delivering high performance IC product designs.
• Assess product feasibility and schedule.
• Prepare technical reviews and product documentation.
• Interface with marketing and applications to define new products and support existing ones.
• Work effectively with cross-functional teams including marketing, sales, applications, and product/test engineering to deliver IC products.
• Undertake multiple projects in parallel and provide technical leadership to design engineers.

Education and Experience

• BSc degree in Electrical, Electronic, or Computer Engineering with significant IC design content, PhD or Masters preferred.
• 7 to 10 years of post-graduate experience in IC product design, preferably for optical and/or wireline applications.
• Experience designing in SiGe BiCMOS and/or CMOS, including low power amplifier design up to 30GHz and beyond, CDR, GA, Equalizers, and Laser Drivers.
• Proven track record of taking high performance, high speed IC designs from concept through to volume production with successful commercial outcome.
• Thorough understanding of analog circuit theory, transmission lines, and device fundamentals.
• Sound appreciation of the impact of IC layout on circuit performance.
• Experienced in Cadence IC design flow and tools, with preferred experience in HFSS, ADS, and microwave modeling.
• Ability to interpret customer and lab verification results to support applications and device characterization.
• Good interpersonal and communication skills with proven analytical and problem-solving skills.

As a confirmed Analog Design engineer, the candidate will contribute into designing best-in-class circuit blocks and IPs like DACs, ADCs, high accuracy amplifiers, dc-dc converters, linear regulators, charge-pumps.

Role Responsibilities

• Work closely with peers as part of an analog design team.
• Supervise physical layout engineers throughout the design process.
• Interface with digital designers and support other teams including verification, validation, application, and test.
• Conduct IP feasibility studies and leverage key differentiators.
• Perform circuit and IP design with the required level of quality, testability, cost, and schedule.
• Ensure exhaustive verification with detailed documentation.
• Conduct analytical system studies and participate in lab validation.
• Report progress and status in the circuit and IP design process and coach less experienced design engineers.

Knowledge Skills and Abilities

• Electronics Engineering Master's degree.
• 5-10 years of experience as an analog design engineer in CMOS process technology.
• Good knowledge of semiconductor device physics and high accuracy circuit design.
• Creative thinking to develop new IPs and solve problems, with strong problem-solving and decision-making skills.
• Proficiency in Cadence Virtuoso framework and analog and mixed-signal simulators such as Spectre/AMS and Eldo/Q-ADMS.
• Capability to work with tools such as MATLAB and Mathcad.
• Good knowledge of design for test methods.
• Sense of urgency, rigor, perseverance, and ability to work under pressure.
• Teamwork, leadership behavior, communication skills, and oral and written technical English skills.

Reporting to senior engineering leadership, the Lead Analog Design Engineer designs and leads development of high-speed analog and mixed signal IC circuit blocks, including operational amplifiers, low jitter PLLs, high speed clock distribution, and voltage regulators from concept through final customer verification. Partnering with CAD and lab teams, this role raises circuit quality by applying deep knowledge of high speed interface standards, jitter, and behavioral mixed signal code across the full design lifecycle.

Day-to-Day Responsibilities

• Lead the design and development of high-speed analog and mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements.
• Design high-speed circuits including Operational Amplifiers, low-jitter PLLs, high-speed clock distribution, bias and bandgap, and voltage regulators.
• Demonstrate strong analog aptitude and problem-solving skills with experience in behavioral mixed signal code.
• Apply working knowledge of high-speed interface standards and their electrical requirements, and a thorough understanding of jitter.
• Use CAD tools proficiently for circuit simulation, layout, and physical verification.

Professional Experience

• Master's degree in Micro-Electronics, Electronic Engineering, or equivalent.
• Knowledge of one or more key analog IC design areas including high speed comparators, PLLs, oscillators, and low noise design.
• Solid understanding of IC design technology and process/methodology in IC design solutions.
• Familiarity with Cadence analog and mixed-signal EDA tools is a plus.
• Experience at 65nm and below technologies and lab test experience are a plus.
• Strong communication skills both verbal and written in English.
• Ability to work effectively both independently and as part of a team.

High-performance power management silicon depends on the Analog Design Engineer, who designs analog products and blocks including output drivers, operational amplifiers, comparators, voltage references, oscillators, and voltage regulators while supporting a full product development flow from architecture to production. Based within a cross-functional team of application, testing, and product engineers, this role ensures that switching power supply designs and IC layouts meet characterization, testability, and reliability requirements.

Job Functions

• Design analog products and blocks such as high current or high capacitive load output drivers, operational amplifiers, comparators, voltage references, oscillators, error amplifiers, and voltage regulators.
• Design load switches, OVP, and OCP for mobile and portable applications.
• Evaluate, simulate, and analyze power architectures and circuit topologies.
• Perform IC layout including floor planning, DRC, LVS, and LPE.
• Work with application and testing engineers to define optimal characterization and testing solutions.
• Work with product definers and product engineers in full product development flow.

Skills and Qualifications

• Minimum 3 years of direct power switches or power management circuits design experience with MSEE or above degree.
• Strong knowledge in analog CMOS and Bipolar IC design.
• Direct working experience with switching power supplies, AC-DC/DC-DC converters, battery chargers, and their various topologies.
• Theoretical understanding of power electronics and switching power supply topologies.
• Knowledge in analog IC layout.
• MATLAB, Simulink, VerilogA, or other behavioral simulation expertise is a plus.
• Excellent written and oral communication and presentation skills with good interpersonal skills.
• Good command of written and spoken English.

As the Analog Design Engineer, this role manages technology in projects and guides team members to enhance technical capabilities while providing solutions for DC-DC converters, LDO regulators, band-gap references, and precision analog circuits across PVT and mixed signal verification. The engineering group relies on this work to maintain process compliance, minimize project risk, and support silicon validation and debug from schematic through production.

Scope of Work

• Manage technology in projects and provide technical guidance or solutions for work completion.
• Develop and guide team members in enhancing their technical capabilities and increasing productivity.
• Prepare and submit status reports for minimizing exposure.
• Risks on the project or closure of escalations.
• Ensure process compliance in the assigned module and participate in technical discussions or reviews.

Technical Qualifications

• 3-8 years of experience with hands-on knowledge of DC-DC converters and precision analog circuits including operational amplifiers, band-gap references, POR, current limit circuits, LDO regulators, comparators, and oscillators.
• Understanding of small signal analysis, frequency compensation techniques, and ESD.
• Experience with silicon validation and debug processes, and advantage if candidate has experience with high-current designs, multi-phase switching regulators, or FF and FDSOI technology.
• Proficiency in Virtuoso/Tanner for schematic and model design and verification, with MATLAB and Simplis knowledge as a plus.
• Verification experience across PVT, statistical mismatch, and mixed signal verification.
• Good command of English.

Lead Analog Design Engineer guides analog, digital, and layout engineers through schematic design, layout, and verification at block and top level while defining circuit concepts and block specifications in close cooperation with the architect. Working in a project team with architects, product managers, quality engineers, and test engineers, this role coordinates cross-disciplinary IC development to deliver validated products built on a strong foundation of ESD, latch-up, and power IC knowledge.

Ownership Areas

• Lead designers including analog, digital, and layout engineers in the product development phase for schematic, layout, and verification at block and top level.
• Define circuit concepts and determine block specifications in close cooperation with the architect.
• Perform schematic design and verification of analog IP in new or known technologies.
• Guide floor planning and layout implementation of analog and digital blocks.
• Support product and test engineering with the validation of the product.
• Work in a project team with architect, design engineers, test and product engineers, quality engineers, product manager, and project leader.

Requirements

• Bachelor's or Master's degree in Electrical or Electronic Engineering.
• 8+ years of experience in IC design with team leading experience of 2-5 design engineers.
• Experienced in analog design areas including band gap, charge pump, amplifiers, I/O interfaces, and power conversion.
• Good understanding of semiconductor technologies such as SOI and BCD, and device physics.
• Strong affinity with ESD and latch-up mechanisms, and knowledge of power IC or interfacing products.
• Experience with EDA tools such as Synopsys, Cadence, or Mentor.
• Team player with target-driven mindset and very good communication skills in English.

Embedded within a high-speed mixed-signal ASIC design group, the Principal Analog Design Engineer leads efforts to define, plan, implement, and validate silicon for next-generation high data-rate ASIC applications while developing state-of-the-art design practices to minimize performance and schedule risk. Working closely with chip lead engineers and cross-functional reviewers, this role advances design quality and efficiency through system-level architectural oversight and continuous improvement across the full product lifecycle.

Strategic Initiatives

• Establish design requirements and provide system-level architectural overview for high-speed mixed-signal ASICs.
• Lead design efforts to define, plan, implement, and validate silicon for next generation high-speed mixed-signal ASICs.
• Architect and design circuits for high data-rate ASIC applications.
• Develop and support state-of-the-art design practices to minimize performance and schedule risk.
• Prepare documentation and conduct system and circuit-level design reviews.
• Drive a continuous improvement philosophy to improve design quality and efficiency.

Minimum Qualifications

• MSEE or greater with 7+ years as a mixed-signal/analog IC designer.
• Leadership experience in ASIC development with experience across complete product life-cycle from concept phase to failure analysis and yield improvement.
• Practical experience with multi-gigabit CMOS technology and knowledge of fabrication process technology.
• Experience in design and operation of latch-up and ESD circuitry and ensuring long-term reliability of the design.
• Proficiency with Cadence ADE, Spectre simulator, and Calibre LVS/DRC tools.
• Previous chip lead experience is a plus.
• Strong communication skills with the ability to convey sophisticated technical concepts to peers in verbal and written form.

The Analog Design Engineer produces custom circuit designs for system-level and circuit-level PLL applications supporting PCI-Express, Ethernet, and CPRI SerDes standards in deep-submicron and FINFET CMOS technologies. The work directly supports a Synopsys design team in Markham and Mississauga, enabling high-speed transceiver products through rigorous spice simulation and top-level PLL modeling.

Key Deliverables

• Perform custom circuit design in deep-submicron and FINFET CMOS technologies.
• Design analog circuits such as VCOs, charge pumps, and voltage regulators.
• Design high-speed digital circuits such as dividers and clock distribution paths.
• Perform schematic entry and spice simulation of custom circuits.
• Develop PLL top-level modeling and simulation.

Experience and Qualifications

• Post-graduate degree in analog CMOS circuit design or equivalent experience.
• 2+ years of experience in CMOS analog and mixed-signal circuit design.
• Understanding of PLL loop operation and design including VCOs, charge-pumps, regulators, and high-speed dividers.
• Design experience in deep-submicron and FINFET CMOS technologies.
• Proficiency in Hspice, Finesim, or similar spice-type simulators, and schematic entry in Synopsys Custom Designer or similar tools.
• Knowledge of digital timing in PrimeTime and/or Nanotime is an asset.

The Analog Design Engineer to help us develop next generation CMOS image sensors for the Automotive and Industrial markets. These unique products are key components in the growing fields of Advanced Driver-Assistance Systems (ADAS), Autonomous Vehicles, and Robotics. The successful candidate will participate in the design of complex CMOS integrated circuits and have familiarity with analog blocks such as bandgaps, ADCs, switched-capacitor amplifiers, and high-speed interfaces.

Key Responsibilities

• Drive development and verification of ultra-low power analog blocks and mixed signal CMOS sensor ICs for the automotive market.
• Drive analog circuit requirements discussions and technical issues with internal teams and marketing to arrive at agreed product specifications and on-time quality design releases.
• Specify CMOS image sensor performance requirements based on marketing and customer input.
• Propose innovative and creative solutions to meet customer needs.
• Perform detailed transistor level design of analog circuits for new CMOS image sensor products.
• Debug complex integrated circuit problems in the laboratory and support team debug efforts.
• Perform bench characterization and support application engineering bench evaluation efforts.
• Analyze analog and power design aspects related to DFT and collaborate with other teams to develop DFT strategy for block designs.
• Develop CMOS image sensor testing methodologies and plans for high volume production testing.

Education and Experience

• MSc in Electrical Engineering or Physics with 5+ years of relevant experience, or PhD with 2+ years of relevant experience in pixel and image sensor development.
• In-depth knowledge of semiconductor device physics including PN-junction diodes and MOS transistors.
• Deep understanding of classic image sensor ASIC building blocks such as bandgaps, ADCs, switched-capacitor amplifiers, and high-speed interfaces.
• Experience with imaging related lab hardware including light sources, lux meters, test charts, and optical filters, and hands-on experience with sensitive measurement equipment.
• Knowledge of UNIX/Linux and MATLAB, with Cadence analog design and AMS experience as a plus.
• Some knowledge of behavioral top level modeling and mixed signal verification methodology.
• Excellent written and oral communication with proven ability to work independently and in teams.
• Willingness and ability to travel to supplier facilities for design reviews, silicon bring up, and production issues as needed.

The Analog Design Engineer semiconductor process control experience, chipmakers around the globe rely on KLA to ensure that their fabs ramp next-generation devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers.

Core Responsibilities

• Understand and drive system, subsystem, and interface requirements.
• Perform feasibility studies and proof of concepts.
• Translate product level requirements into circuit board designs.
• Work with system, opto-mechanical, firmware, and software engineers to define design requirements and develop electronics subsystem or board-level circuit design.
• Solve challenging engineering problems by characterizing components, designing and prototyping analog circuits, capturing schematics, directing layout, and debugging PCBAs in the lab.
• Define test criteria and implement test plans on functional prototypes to prove reliability and safety of the designed subsystem.
• Deliver full engineering packages to manufacturing to support smooth product transition into mass production and assist with product sustaining efforts.

Required Qualifications

• Doctorate with 3+ years, Master's with 5+ years, or Bachelor's with 7+ years of relevant industry experience designing board-level analog and optoelectronics circuits.
• Strong electrical engineering fundamentals in analog/RF design, optoelectronics design, and signal/power integrity.
• Proficiency in Spice and EM simulation and lab correlation in both frequency and time domain.
• Expertise in schematic capture and board layout tools including OrCAD and Cadence Allegro.
• Proficiency in lab environments using oscilloscopes, spectrum analyzers, and network analyzers.
• Experience with data analysis through MATLAB and/or Python is a plus.
• Ability to collaborate with multi-functional teams including Optical, Mechanical, Software, and Systems Engineering.

The Analog Design Engineer is building fundamentally new technology to extend Moore's Law beyond the limits of Silicon. Our team is composed of members who have shipped technology used in billions of devices and by hundreds of millions of people. We are well funded and are backed by pioneers in the field of computing to include the largest chipmakers. We have major customers and partners and enjoy solving hard technical challenges. You will be working to build a company with a breakthrough technology that will be used in the first computers to go beyond silicon.

Work Activities

• Identify specs, translate them to testbenches, and design to end specifications in a given process technology for various circuit components.
• Architect and design high performance analog and mixed-signal circuits and systems to meet specifications.
• Collaborate with digital design to integrate analog and digital systems.
• Model novel device features in VerilogA and simulate the design.
• Guide and help custom layout engineers with supporting and debug of DRC/LVS.
• Perform chip and board level validation and debugging.
• Create, define, and develop system validation environment and test suite.
• Use and apply emulation and platform level tools and techniques to ensure performance to spec.

Qualifications and Experience

• PhD in Electrical Engineering with 2+ years, or MS with 5+ years of experience developing analog, mixed-signal, and memory circuit blocks and products, with multiple tapeout experience in industry leading nodes.
• Deep knowledge of high volume commercial CMOS ICs and excellent understanding of various reliability metrics.
• Strong skills in analog/mixed-signal IC circuit design including clocking, op-amps, regulators, data converters, switched capacitor circuits, charge pumps, memory design, and IO interfaces.
• Designing analog IC products taken from concept and definition to volume production with good understanding of product manufacturability and reliability.
• Expertise in voltage regulator topologies is a plus.
• Familiarity with software tools including Cadence, Excel, MATLAB, Mentor, and Synopsys.
• Excellent communication skills both written and verbal, with strong teamwork, dedication, and collaboration skills.

The Analog Design Engineer will be a member of the Readout Integrated Circuit (ROIC) development team of DRS' Electro Optics and Imaging Systems (EOIS) division. In this role, the Analog IC Design Engineer will work closely with other team members to develop analog integrated circuits (IC) for ROIC and Focal Plane Arrays (FPA). The key responsibilities are the following: Analog and mixed signal design of sub-blocks including DACs, ADCs, buffers, reference generation, PLLs and custom digital control.

Delivery Expectations

• Perform block-level and top-level simulations to verify functionality and performance goals.
• Drive mask design to implement layout view of designs.
• Perform circuit characterization and validation in a lab environment.
• Drive review of yield and lab test results to fix bugs.
• Produce documentation including circuit specifications, ROIC user documentation, test reports, and design review presentations.
• Specify block-level and top-level mixed-signal and analog designs and develop behavioral modeling of mixed-signal and analog blocks.
• Oversee layout design and perform transistor-level analog circuit design.

Background and Experience

• MSEE with 6+ years in CMOS mixed-signal and analog IC design.
• Strong fundamentals in noise analysis and modeling with knowledge of ADC and DAC architectures.
• Experience implementing high-coverage, top chip simulations on large mixed signal IC designs.
• Proven experience completing mixed-signal and analog designs including band-gaps, bias circuits, op-amps, PLLs, and regulators.
• Knowledge of infrared detector products and familiarity with digital IC design using Verilog.
• Working experience with Virtuoso and Calibre, and proficiency using spectrum analyzers, oscilloscopes, signal generators, and other lab equipment.
• Knowledge of C, MATLAB, and VerilogA modeling of design blocks, and ability to analyze data in MATLAB or Mathcad.
• Excellent written and oral communication skills with demonstrated ability to execute large group and customer presentations.

The Analog Design Engineer group is responsible for all research, design, development, test and qualification of camera hardware for Apple products. In this role, you will be at the center of the image sensor design effort, with a critical impact on camera design. This includes scoping and documenting analog/mixed-signal drivers for camera system, engaging in design execution and driving analog/mixed signal validation.

Areas of Ownership

• Collaborate with the wider camera team to understand feature requirements that drive camera silicon needs.
• Evaluate alternate analog and mixed-signal architectures for image sensor ASICs.
• Evaluate power and performance trade-offs and complexities of implementation.
• Document driver IC requirements to the detail required for successful implementation.
• Negotiate design targets and specifications with vendors, drive vendor selection, design execution, silicon validation, and productization.
• Develop a roadmap of capabilities for future silicon revisions and camera platforms.
• Drive test chip design targets and characterization methodologies.
• Present at meetings on camera performance, features, and capabilities.

Qualifications and Experience

• BS required in Electrical Engineering, MS or PhD preferred.
• Deep understanding of classic building blocks of an image sensor ASIC including pixel buffer, column buffer, column-based low power ADC, analog voltage references, voltage generators, and regulators.
• Familiarity with analog simulation flow for circuit performance verification in time and frequency domains, including signal stability, noise, PSRR, and design trade-offs across process corners.
• Understanding of image sensor internal timing requirements and array driving techniques.
• General understanding of camera system level requirements.
• Previous experience with image sensor designs and familiarity with industry trends and status is a plus.
• Willingness and ability to travel to supplier facilities for design reviews, silicon bring up, and production issues as needed.

The Analog Design Engineer to define, design, evaluate, analyze, and debug Analog and Mixed Signal Integrated circuits intended for Automotive and Industrial systems. In this role you will determine best design and simulation practices, analyze and implement behavioral models to explore design tradeoffs, and lead transistor-level design of to meet product requirements. Strong analog design skills, a strong foundation in Semiconductor device physics and creative problem-solving skills are essential for this position.

Performance Expectations

• Lead design development from concept datasheet to production and mentor junior design engineers in the transistor-level design phase.
• Work with Systems Engineering to define key blocks and systems.
• Use various software environments for behavioral modeling and verification of complex mixed-signal integrated circuit systems and develop top level simulation plan to verify datasheet specifications.
• Provide guidance and supervise layout.
• Collaborate with Product and Systems Engineers during silicon evaluation and test development.

Skills and Qualifications

• MSEE with 6+ years or PhD with 3+ years of experience in analog/mixed signal IC design.
• Experience in precision analog CMOS, BiCMOS, Bipolar, and DMOS design.
• Mixed signal design experience with proven track record of solving challenging problems during design and debug.
• Proficiency using Cadence design tools and behavioral modeling languages.
• Ability to clearly communicate ideas and concepts effectively within a team environment.

The Analog Design Engineer runs complex board design projects within the Electronics Division's Embedded Electronics Group, applying sound engineering principles to design precision, low-noise analog signal conditioning circuits within mixed-signal PCB designs. Collaborating across cross-functional engineering teams, this role requires a government security clearance and delivers verified circuit performance through detailed electrical analysis, simulation, prototype bring-up, and thorough documentation.

Operational Focus

• Perform analysis and design of analog, mixed-signal, sensor interface, and control electronics.
• Perform detailed electrical analysis including transfer function derivation, stability analysis, noise analysis, error analysis, and circuit model generation.
• Perform schematic capture and manage PCB layout design resources.
• Simulate analog designs using tools such as LTSpice and MATLAB.
• Perform prototype bring up, debugging, functional verification, and performance characterization.
• Develop circuit requirements and documentation.

Required Qualifications

• BSEE required, MSEE preferred, with 7+ years of overall experience.
• Expertise designing with op-amps, BJTs, MOSFETs, diodes, transformers, and other common analog circuits.
• Strong analysis and problem-solving skills with great electrical engineering fundamentals.
• Desire to learn and investigate novel solutions to challenging circuit design problems.
• Applicants must obtain and maintain a government security clearance and be capable of working onsite, with remote work periodically allowed based on program needs.

The Analog Design Engineer designs next-generation mixed-signal automotive ASICs for Powertrain and Power Electronic Electrification products, performing schematic capture, simulation, and lab evaluation while training and mentoring less experienced engineers. As a member of a product development team, this role coordinates with layout designers and cross-site engineering colleagues to deliver circuit block documentation and verified designs from block-level specification through prototype evaluation.

Key Responsibilities

• Perform schematic capture and simulation.
• Develop efficient circuit designs meeting functional and yield requirements.
• Work with layout designer to implement layout of circuit blocks.
• Prepare and present detailed circuit design reviews.
• Evaluate samples in laboratory and investigate new circuit design architectures.
• Produce design documentation of circuit blocks.
• Train and mentor less experienced engineers and assist with training of new hires.

Technical Qualifications

• BSEE or related field required with 8+ years of industry experience, subject matter expert in IC preferred, and automotive IC design experience preferred.
• Proven track record of transistor level, analog and mixed signal IC design in CMOS or BiCMOS technologies.
• Knowledge of microelectronic fundamentals and semiconductor electronics.
• Experience in laboratory evaluation of analog sub-blocks as part of prototype evaluation activities.
• Proficiency with Cadence analog and mixed-signal design tools including Virtuoso and Spectre, analog circuit simulators, behavioral modeling languages such as VerilogA and VerilogAMS, and Linux and Windows OS.
• Basic understanding of statistics and ability to work with team members across multiple design locations.
• Strong technical and verbal communication skills with excellent problem-solving skills.

The Analog Design Engineer crafts high performance analog and RF circuits for transceiver subsystems including LNAs, mixers, frequency synthesizers, converters, power management circuits, filters, and drivers within the Software-Defined Radio Platform Group. Working closely with system, digital, analog, RF designers, and firmware engineers, this role leads design development and product specification for state-of-the-art software-defined radio solutions in wireless communication systems.

Key Responsibilities

• Lead and participate in circuit design, simulation, verification, iteration, and evaluation to meet performance goals.
• Analyze circuit layout and lab experiments.
• Perform and lead prototype evaluation and debug.
• Collaborate with cross-functional teams including digital, software, application, and product engineers.
• Lead and participate in product specification and architecture development.

Position Requirements

• Master's or PhD degree with minimum 6 years of experience.
• Commanding knowledge of CMOS RF, analog, and mixed-signal IC transistor level design for signal processing and communication systems.
• Experience in design of LNA, mixer, high speed converters, synthesizer, and power management.
• Experience in RF system architecture is a plus.
• Experience in technical and project leadership is a big plus.

The Analog Design Engineer to join a growing team of engineers working on high speed design projects for customers across the semiconductor industry. Mainly you'll focus on projects relating to optical communications but you'll also have the opportunity to contribute to the development of licensable IP.

Activities

• Create clear sets of specifications from customer requirements and use these to develop analog blocks.
• Take proactive steps throughout the development process to ensure analog blocks are created in line with key performance metrics.
• Perform setup of test benches for the verification process of analog blocks.
• Ensure analog blocks are effectively optimized at the schematic level and post layout, having performed both layout design and verification.
• Participate in design reviews to ensure designs are in line with initial specifications and any updates in customer needs, and provide follow-up through accurate documentation.

Minimum Qualifications

• Degree in Electronics Engineering or related field.
• At least 2+ years of experience in a related role such as ASIC Design Engineer or Analog Design Engineer.
• Strong knowledge of the Cadence toolset particularly in layout and layout verification.
• Programming skills in Python are a positive.
• Excellent communication skills particularly with external stakeholders.
• Ability to work autonomously on design projects.